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Serial rapidio loopback example does not work

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Serial rapidio loopback example does not work

I want to run Serial Rapid IO example on Zynq 7030. I imported an example named  xsrio_dam_loopback_example. I edited its variable MEM_ADDR
#define MEM_ADDR         XPAR_PS7_RAM_0_S_AXI_BASEADDR
It crashes when program execution reaches XSrio_CfgInitialize(), the CPU does not halt when I run it in Debug mode in SDK and i have to manually hard reset the FMC Carrier card.Can you please help.

JFoster
Moderator(75)
Hello,

Hello,

We no longer offer support for PicoZed SDR. For support please contact ADI.

--Josh

Is it End of life ? Sorry, by

Is it End of life ? Sorry, by ADI do you mean Avnet

JFoster
Moderator(75)
Hello Sheh,

Hello Sheh,

By ADI I mean Analog Devices. http://www.analog.com/en/index.html

The product is not End of Life, however it has been rebranded and is no longer supported by Avnet.

Please see this post http://zedboard.org/content/future-pzsdr

--Josh

mbrown
Moderator(7)
PicoZed SDR used a Z7035.

Josh,

PicoZed SDR used a Z7035. This support question seems to be about a PicoZed with Z7030, which is not EOL.

 

/Matt

JFoster
Moderator(75)
Hello sheh,

Hello sheh,

Can you please confirm, is your question in regards to our PicoZed 7030 SOM (Red board) or the PicoZed SDR SOM (Black SOM). My apologies, I assumed based on the forum your posted on it was in relation to the PicoZed SDR which showcases a Zynq 7035.

--Josh

JFoster

JFoster
My question is regarding the red board. It has pizoZed 7015/7030 written on silkscreen PCB layer. It is connected to PicoZed FMC carrier card gen2

JFoster
Moderator(75)
Hello Sheh,

Hello Sheh,

Looking into your question, you are asking about the Xilinx example application xsrio_dam_loopback_example which can be found in SDK correct? Unfortunatly I do not have much experience with this example. This example was created by Xilinx and they would be your best source in identifying the issue you are facing. Please make a post at the Xilinx forum highlighting the error you are recieving when running their example code.

https://forums.xilinx.com/

--Josh

JFoster

JFoster
Yes,
In board support package (BSP), the system.mss file lists srio_gen2_0. It has an option "Import examples" next to it and the application that I import is xsrio_dma_loopback_example. I found out why my program was hanging at initialization. it is because the SRIO clocks were not enabled by FPGA engineer. Now it is up and running but halts later at command
 /* Set the Water Mark Level to transfer priority 0,1,2 packet */
XSrio_SetWaterMark(InstancePtr, 0x5, 0x4, 0x3);
I posted the same question about Z7030 on the forum you quoted but they were clueless about this device with its former name and I received no help.

JFoster
Moderator(75)
Hell Sheheer,

Hell Sheheer,

Please ask this question over at the Xilinx Forum.

Thank you,

Josh